RADXA CM5

Caractéristiques (extraites automatiquement)

Description

Radxa´s CM5 is an advanced SoM (System on Module) based on the RK3588S2 SOC The Radxa CM5 integrates the Central Process Unit (CPU), Graphics Processing Unit (GPU), Neural Processing Unit (NPU), Power Management Unit (PMU), LPDDR4X DRAM Memory and onboard eMMC Storage in a small form factor of just 55mm x 40m. Radxa´s CM5 offers an out of the box, cost-effective solution for countless applications. It as well simplifies and accelerates new product developments. Overview of features: Quad core 64 bit High Performance Solution Radxa CM5 is powered by the Rockchip RK3588S2 SoC, a 64bit Quad Cortex®-A76 @2.2~2.4GHz and Quad Cortex®-A55 @1.8GHz (ARM v8). It comes with a maximum of 32GB RAM and up to 256GB eMMC storage. Detailed technical specs: Processor: Rockchip RK3588S2, Quad Cortex®-A76 @2.2~2.4GHz and Quad Cortex®-A55 @1.8GHz (ARM v8) based on Arm® DynamIQ™ configuration GPU: Arm Mali™ G610MP4 NPU: 6TOPs@INT8 Memory: 4GB, 8GB, 16GB or 16GB LPDDR4X (depending on variant) Storage: 32GB/ 64GB /128GB /256GB onboard eMMC Multimedia: H.265 and VP9 decoder by 8K@60fps H.264 decoder by 8K@30fps AV1 decoder by 4K@60fps H.264 and H.265 encoder by 8K@30fps Ethernet: 1 x Onboard Gigabit Ethernet PHY Display: 1x HDMI TX up to 8K@60hz・ 1x eDP TX up to 4K@60Hz 1x DP TX (and USB3.0 Combo) up to 8K@30Hz 1x 2‑lane MIPI D/C‑PHY TX 1x 4‑lane MIPI D/C‑PHY TX Camera: 1x 2‑lane MIPI D/C‑PHY RX 1x 4‑lane MIPI D/C‑PHY RX Connectivity: 2 × USB 2.0 Host Port (HighSpeed)・ 1 x USB 3.0 Host Port (SuperSpeed)・ 1 x USB 3.0 OTG Port 2 x PCIe2.0 1‑lane, one shared with USB3 and SATA, one shared with SATA 2 x SATA ports, one shared with USB3 and PCIe2.0, one shared with PCIe2.0 Up to 10x UART Up to 5x SPI Up to 3x CAN Up to 7x I2C Up to 15x PWM Up to 2x I2S Up to 2x PDM Up to 2x SPDIF TX Power Input: 5V DC, Max 5.2V Connector: Connector Type: 3x 100‑Pin B2B Connector Software: Debian/Ubuntu Linux support Android 11/12 support Dimensions: 55mm x 40mm RADXA CM5 will remain in production until at least